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rev. 1.0 october 2010 www.aosmd.com page 1 of 11 AOZ8804A ultra-low capacitance tvs diode general description the AOZ8804A is a transient voltage suppressor array designed to protect high speed data lines such as hdmi, usb 3.0, mddi, sata, and gigabit ethernet from damaging esd events. this device incorporates eight surge rated, low capacitance steering diodes and a tvs in a single package. during transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. the AOZ8804A provides a typical line to line capacitance of 0.3pf and low insertion loss up to 6ghz providing greater signal integrity maki ng it ideally suited for hdmi 1.3 or usb 3.0 applications, such as digital tvs, dvd players, computing, set-top boxes and mddi applications in mob ile computing devices. the AOZ8804A comes in a rohs compliant and halogen free 2.5mm x 1.0mm x 0.55mm dfn-10 package and is rated -40c to +85c junction temperature range. features z esd protection for high-speed data lines: ? iec 61000-4-2, level 4 (esd) immunity test ? air discharge: 15kv; contact discharge: 15kv ? iec61000-4-4 (eft) 40a (5/50ns) ? iec61000-4-5 (lightning) 2.5a (8/20s) ? human body model (hbm) 24kv z array of surge rated diodes with internal tvs diode z small package saves board space z protects four i/o lines z low capacitance between i/o lines: 0.3pf z low clamping voltage z low operating voltage: 5.0v applications z hdmi, usb 3.0, mddi, sata ports z monitors and flat panel displays z set-top box z video graphics cards z digital video interface (dvi) z notebook computers typical applications figure 1. usb 3.0 ports figure 2. hdmi ports AOZ8804A AOZ8804A tx2+ tx2- tx1+ tx1- tx0+ tx0- clk+ clk- hdmi transmitter rx2+ rx2- rx1+ rx1- rx0+ rx0- clk+ clk- hdmi receiver connector connector AOZ8804A AOZ8804A aoz8802a AOZ8804A d+ d- ssrx+ ssrx- sstx+ sstx- usb 3.0 transceiver d+ d- ssrx+ ssrx- sstx+ sstx- usb 3.0 connector
AOZ8804A rev. 1.0 october 2010 www.aosmd.com page 2 of 11 ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. pin configuration absolute maximum ratings exceeding the absolute maximum ratings may damage the device. notes: 1. iec 61000-4-2 discharge with c discharge = 150pf, r discharge = 330 ? . 2. human body discharge per mil-std-883, method 3015 c discharge = 100pf, r discharge = 1.5k ? . maximum operating ratings part number ambient temperature range package environmental AOZ8804Adi -40c to +85 c dfn-10 rohs compliant green product 1 2 3 4 5 10 9 8 7 6 ch1 ch2 vn ch3 ch4 nc nc vn nc nc dfn-10 (top view) parameter rating storage temperature (t s ) -65c to +150c esd rating per iec61000-4-2, contact (1) 15kv esd rating per iec61000-4-2, air (1) 15kv esd rating per human body model (2) 24kv parameter rating junction temperature (t j ) -40c to +125c
AOZ8804A rev. 1.0 october 2010 www.aosmd.com page 3 of 11 electrical characteristics t a = 25c unless otherwise s pecified. specifications in bold indicate a temperature range of -40c to +85c. notes: 3. the working peak reverse voltage, v rwm , should be equal to or greater than the dc or continuous peak operating voltage level. 4. v br is measured at the pulse test current i t . 5. measurements performed using a 100ns transmission line pulse (tlp) system. symbol parameter conditions min. typ. max. units v rwm reverse working voltage between i/o and vn (3) 5.0 v v br reverse breakdown voltage i t = 1ma, between i/o and vn (4) 6.0 v i r reverse leakage current v rwm = 5v, between i/o and vn 1 a v f diode forward voltage i f = 15ma 0.70 0.85 1 v v cl channel clamp voltage positive transients negative transient i pp = 1a, tp = 100ns, any i/o pin to ground (5) 12.0 -3.0 v v channel clamp voltage positive transients negative transient i pp = 5a, tp = 100ns, any i/o pin to ground (5) 14.0 -5.0 v v channel clamp voltage positive transients negative transient i pp = 12a, tp = 100ns, any i/o pin to ground (5) 16.5 -7.0 v v channel clamp voltage any i/o pin to ground i pp = 1a, tp = 8/20s 12.0 v c j channel input capacitance v r = 0v, f = 1mhz, between i/o pins 0.30 0.35 pf v r = 0v, f = 1mhz, any i/o pin to ground 0.60 0.75 pf
rev. 1.0 october 2010 www.aosmd.com page 4 of 11 AOZ8804A typical performance characteristics (t period = 100ns, t r = 1ns) forward voltage vs. forward peak pulse current forward current, i pp (a) i/o ? gnd insertion loss (s21) vs. frequency frequency (mhz) s21 (db) analog crosstalk (i/o?i/o) vs. frequency frequency (mhz) insertion loss (db) 1 10 100 1000 10000 -120 -100 -80 -60 -40 -20 0 1 10 100 1000 10000 -3.00e+01 -2.50e+01 -2.00e+01 -1.50e+01 -1.00e+01 -5.00e+00 0.00e+00 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 14 forward voltage (v) (t period = 100ns, t r = 1ns) clamping voltage vs. peak pulse current peak puse current, i pp (a) 2 4 6 8 10 12 14 16 18 0 2 4 6 8 10 12 14 clamping voltage, v cl (v)
AOZ8804A rev. 1.0 october 2010 www.aosmd.com page 5 of 11 tdr for hdmi 1.3 the AOZ8804A tdr test results indicates the minimal effect the low capacitance has on the hdmi 1.3 tdr measurements. figure 3 and figure 4 below are the graphs from the tdr measurements. the two graphs show the before and after results of the tdr differential data line of the hdmi when the AOZ8804A was populated onto the pcb. the use of "skinny traces" can further limit the tdr to within 100 5 . below are the tdr measurements with the use of skinny traces to compensate the added capacitor from the aoz8804. figure 3 shows the increase in impedance from the skinny traces between m1 and m2 cursors. with the increase in impedance the AOZ8804A added capacitor will now reduce the tdr within the 100 5 . figure 3. compensated stripe-line fig ure 4. compensated stripe-line with AOZ8804A device on the board figure 5 shows the graphical representation of the scope photo of the tdr and the pcb board. the cursor m1 represent the edge of the connector in which the equipment was calibrated to. the cursor m2 represent the leveling off of the100 when the signal passes through the AOZ8804A.. figure 5. aos hdmi compen sated evaluation board 125 120 115 110 105 100 95 90 85 80 75 125 120 115 110 105 100 95 90 85 80 75 0.2000 ns/ -0.2500 ns (step 2.56 ps) 0.2000 ns/ -0.2500 ns (step 2.56 ps) 1.7500 ns 1.7500 ns m1 m1 AOZ8804A compensated stripe-line number of layers 4 copper trace thickness 1.4 mils dielectric constant, r 4.6 overall board thickness 62 mils dielectric thickness between top and ground layer 10 mils
rev. 1.0 october 2010 www.aosmd.com page 6 of 11 AOZ8804A high speed pcb layout guidelines printed circuit board layout is the key to achieving the highest level of surge immunity on power and data lines. the location of the protection devices on the pcb is the simplest and most important design rule to follow. the AOZ8804A devices should be located as close as possible to the noise source. the placement of the AOZ8804A devices should be used on all data and power lines that enter or exit the pcb at the i/o connector. in most systems, surge pulses occur on data and power lines that ente r the pcb through the i/o connector. placing the AOZ8804A devices as close as possible to the noise source ensures that a surge voltage will be clamped before the pu lse can be coupled into adjacent pcb traces. in addition, the pcb should use the shortest possible traces. a sh ort trace length equates to low impedance, which ensures that the surge energy will be dissipated by the AOZ8804A device. long signal traces will act as antennas to receive energy from fields that are produced by the esd pulse. by keeping line lengths as short as possible, the efficiency of the line to act as an antenna for esd related fields is reduced. minimize interconnecting line lengths by placing devices with the most interconnect as close together as possible. the protection circuits should shunt the surge voltage to either the reference or chassis ground. shunting the surge voltage directly to the ic?s signal ground can cause ground bounce. the clamping performance of tvs diodes on a single ground pcb can be improved by minimizing the impedance with relatively short and wide ground traces. the pcb layout and ic package parasitic inductances can cause significant overshoot to the tvs?s clamping voltage. the inductance of the pcb can be reduced by using short trace lengths and multiple layers with separate ground and power planes. one effective method to minimize loop problems is to incorporate a ground plane in the pcb design. the AOZ8804A ultra-low capacitance tvs is designed to protect four high speed data transmission lines from transient over-voltages by clamping them to a fixed reference. the low inductance and construction minimizes voltage overshoot during high current surges. when the voltage on the protected line exceeds the reference voltage the internal steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. the AOZ8804A is designed for the ease of pcb layout by allowing the traces to run underneath the device. the pi nout of the AOZ8804A is designed to simply drop onto the io lines of a high definition multimedia interface (hdmi) or usb 3.0 design without having to divert the signal lines that may add more parasitic inductance. pins 1, 2, 4 and 5 are connected to the internal tvs devices and pins 6, 7, 9 and 10 are no connects. the no connects was done so the package can be securely soldered onto the pcb surface. figure 6. flow through layout for hdmi figure 7. flow through layout for usb 3.0 clock data0 ground data1 data2 clock data0 ground data1 data2 ssrx+ ssrx? ground sstx+ sstx? ssrx+ ssrx? ground sstx+ sstx?
AOZ8804A rev. 1.0 october 2010 www.aosmd.com page 7 of 11 high speed pcb layout guidelines (continued) based on the AOZ8804A dfn-10 package design a very straight forward layout can be achieved. to give the tdr an extra level of margin the traces may be compensated to have a nominal impedance of 90 ? for usb or 100 ? for hdmi throughout the differential pair. to make the design perfect the added capacitance of the device will have to be compensated by the use of ?skinny traces?. the skinny traces are a narrow stripe line acting to lower the parasitic capacitance on the differential stripe line. the differential impedance of the transmission line becomes well centered to 90 ? or to 100 ? . a layout em field simulator is recommended before fabrication to insure a perfect stripe line. with careful layout and placement of the device, the AOZ8804A can protect the usb 3.0 and hdmi data line effectively and safely and meet the esd immunity requirements of the iec61000-4-2, level 4, 15kv air discharge, 8kv contact discharge. figure 8. usb 3.0 pcb layout with compensated traces . number of layers 4 copper trace thickness 1.4 mils dielectric constant, r 4.6 overall board thickness 62 mils dielectric thickness between top and ground layer 10 mils
rev. 1.0 october 2010 www.aosmd.com page 8 of 11 AOZ8804A figure 9. hdmi pcb layout with compensated traces number of layers 4 copper trace thickness 1.4 mils dielectric constant, r 4.6 overall board thickness 62 mils dielectric thickness between top and ground layer 10 mils
AOZ8804A rev. 1.0 october 2010 www.aosmd.com page 9 of 11 package dimensions, dfn- 10 2.5mm x 1.0mm x 0.5mm note: 1. controlling dimension is millimeter. converted inch dimensions are not necessarily exact. e pin #1 dot by marking a a1 c 0.30 0.50 0.10 0.15 0.36 0.72 0.40 0.20 1.20 0.24 0.48 db b1 e 1 5 e pin #3 identification r 0.130 l symbols a a1 b b1 c d e e l dimensions in millimeters recommended land pattern side view top view bottom view min. 0.50 0.00 0.15 2.45 0.95 0.33 nom. 0.55 0.20 0.40 0.152 ref. 2.50 1.00 0.50 bsc 0.38 max. 0.60 0.05 0.25 2.55 1.05 0.43 symbols a a1 b b1 c d e e l dimensions in inches min. 0.020 0.000 0.006 0.096 0.037 0.013 nom. 0.022 0.008 0.016 0.006 ref. 0.098 0.039 0.020 bsc 0.015 max. 0.024 0.002 0.010 0.100 0.041 0.017
rev. 1.0 october 2010 www.aosmd.com page 10 of 11 AOZ8804A tape and reel dimensions, df n-10 2.5mm x 1.0mm x 0.5mm carrier tape reel aCa leader / trailer & orientation tape size 8mm reel size ?178 m ?178.0 1.0 package dfn 2.5x1.0 t 0.25 0.05 b0 2.62 0.05 a0 1.12 0.05 k0 0.70 0.05 d0 ?1.55 0.05 d1 ?0.55 0.05 e1 1.75 0.1 e 8.00 +0.3/-0.1 e2 3.50 0.05 p0 4.00 0.10 p1 4.0 0.10 p2 2.0 0.05 n ?60.0 0.5 trailer tape 300mm min. components tape orientation in pocket leader tape 500mm min. e1 e2 e t r g unit: mm unit: mm feeding direction w 11.80 0.5 h ?13.0 +0.5 / C0.2 w1 9.0 0.5 s 2.40 0.10 k 10.25 0.2 e ?9.8 r w1 m w n h sk ref 5 b0 k0 p1 p2 d0 d1 p0 a0
AOZ8804A rev. 1.0 october 2010 www.aosmd.com page 11 of 11 part marking dc12 part number code assembly lot code week and year code AOZ8804Adi (2.5 x 1.0 dfn) as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. this datasheet contains preliminary data; supplementary data may be published at a later date. alpha & omega semiconductor reserves the right to make changes at any time without notice. life support policy alpha & omega semiconductor products ar e not authorized for use as critical components in life support devices or systems.

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